
Stacked single-crystalline field-effect transistors
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Access through your institution Buy or subscribe The researchers — who are based at the Massachusetts Institute of Technology, the Samsung Advanced Institute of Technology, Sungkyunkwan
University and the University of Texas at Dallas — show that confined selective growth of transition metal dichalcogenides can be used to integrate n-type field-effect transistors based on
molybdenum disulfide on top of p-type field-effect transistor arrays based on tungsten diselenide at 385 °C. Nucleation events occur at the edges and corners of areas that are geometrically
confined using silicon dioxide growth masks on amorphous hafnium oxide surfaces. The distribution and size of the trenches ensures only a single nucleation event occurs per trench, which
leads to a single-crystalline domain. The team fabricated 32 vertical two-dimensional-material-based complementary metal–oxide–semiconductor (CMOS) devices at a yield of around 94% and
showed that the approach can be used to create operational inverters, as well as NAND and NOR gates. This is a preview of subscription content, access via your institution ACCESS OPTIONS
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Read our FAQs * Contact customer support AUTHOR INFORMATION AUTHORS AND AFFILIATIONS * Nature Electronics https://www.nature.com/natelectron/ Katharina Zeissler Authors * Katharina Zeissler
View author publications You can also search for this author inPubMed Google Scholar CORRESPONDING AUTHOR Correspondence to Katharina Zeissler. RIGHTS AND PERMISSIONS Reprints and
permissions ABOUT THIS ARTICLE CITE THIS ARTICLE Zeissler, K. Stacked single-crystalline field-effect transistors. _Nat Electron_ 8, 8 (2025). https://doi.org/10.1038/s41928-025-01342-0
Download citation * Published: 27 January 2025 * Issue Date: January 2025 * DOI: https://doi.org/10.1038/s41928-025-01342-0 SHARE THIS ARTICLE Anyone you share the following link with will
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